http://www.ratatanek.cz/hg/avricsp/ en-us avricsp Changelog avricsp Changelog Removed completion polling. Added :clock command. http://www.ratatanek.cz/hg/avricsp/rev/c4516d3209bb
* completion polling doesn't work on atmega128
* SPI speed is derived from the value set by :clock. Defaults to 1000 (kHz).]]> Martin Vejnar <avakar@ratatanek.cz> Wed, 21 Apr 2010 16:43:28 +0200 Moved the reset control pin to PD7 to free both PD5 and PD6 for clock generation. http://www.ratatanek.cz/hg/avricsp/rev/33773dd6820f Martin Vejnar <avakar@ratatanek.cz> Tue, 20 Apr 2010 19:50:29 +0200 Moved the reset control pin to PD6 to free PD5 for clock generation. http://www.ratatanek.cz/hg/avricsp/rev/07353b012cca Martin Vejnar <avakar@ratatanek.cz> Tue, 20 Apr 2010 19:45:42 +0200 Do not drive the SPI lines after startup. http://www.ratatanek.cz/hg/avricsp/rev/fbef86c2eea9 Martin Vejnar <avakar@ratatanek.cz> Mon, 05 Apr 2010 17:09:22 +0200 Added chip definitions for atmega168 and atmega128. http://www.ratatanek.cz/hg/avricsp/rev/3c931b068396 Martin Vejnar <avakar@ratatanek.cz> Fri, 02 Apr 2010 23:10:36 +0200 Switched to using watchdog reset to enter bootloader. http://www.ratatanek.cz/hg/avricsp/rev/41a76bb4ddec Martin Vejnar <avakar@ratatanek.cz> Fri, 02 Apr 2010 23:10:14 +0200 Updated dependency list for changeset a72c949f70e0 http://www.ratatanek.cz/hg/avricsp/rev/3f833e6efb66 Martin Vejnar <avakar@ratatanek.cz> Thu, 01 Apr 2010 16:42:54 +0200 Initial import, tested on atmega48. http://www.ratatanek.cz/hg/avricsp/rev/a72c949f70e0 Martin Vejnar <avakar@ratatanek.cz> Thu, 01 Apr 2010 16:42:52 +0200